#include <SimReadoutEventCnv.h>
Inheritance diagram for SimReadoutHeaderCnv:
Definition at line 21 of file SimReadoutEventCnv.h.
SimReadoutHeaderCnv::SimReadoutHeaderCnv | ( | ISvcLocator * | svc | ) |
Definition at line 8 of file SimReadoutEventCnv.cc.
00009 : RootIOTypedCnv<PerSimReadoutHeader,SimReadoutHeader>("PerSimReadoutHeader", 00010 classID(),svc) 00011 { 00012 00013 m_saveSimReadouts = true; 00014 char* pruneSimReadouts = getenv("NUWA_PRUNESIMREADOUTS"); 00015 if (pruneSimReadouts) { 00016 m_saveSimReadouts = false; 00017 } 00018 }
SimReadoutHeaderCnv::~SimReadoutHeaderCnv | ( | ) | [virtual] |
static const CLID& SimReadoutHeaderCnv::classID | ( | ) | [inline, static] |
Definition at line 25 of file SimReadoutEventCnv.h.
00025 { 00026 return DayaBay::CLID_SimReadoutHeader; 00027 }
StatusCode SimReadoutHeaderCnv::PerToTran | ( | const PerSimReadoutHeader & | perobj, | |
DayaBay::SimReadoutHeader & | tranobj | |||
) | [virtual] |
Copy data from TObject based class of type TType to DataObject based class of type DOType.
Implements RootIOTypedCnv< PerSimReadoutHeader, DayaBay::SimReadoutHeader >.
Definition at line 25 of file SimReadoutEventCnv.cc.
00027 { 00028 MsgStream log(msgSvc(), "SimReadoutHeaderCnv::PerToTran"); 00029 00030 StatusCode sc = HeaderObjectCnv::toTran(perobj,tranobj); 00031 if (sc.isFailure()) return sc; 00032 00033 vector<PerSimReadout*> in_vec = perobj.readouts; 00034 vector<PerSimReadout*>::iterator it; 00035 00036 for(it = in_vec.begin(); it != in_vec.end(); ++it) 00037 { 00038 SimReadout* simReadout = convert(**it); 00039 simReadout->setHeader(&tranobj); 00040 tranobj.readouts().push_back(simReadout); 00041 } 00042 return StatusCode::SUCCESS; 00043 }
StatusCode SimReadoutHeaderCnv::TranToPer | ( | const DayaBay::SimReadoutHeader & | tranobj, | |
PerSimReadoutHeader & | perobj | |||
) | [virtual] |
Copy data from DataObject based class of type DOType to TObject based class of type TType.
Implements RootIOTypedCnv< PerSimReadoutHeader, DayaBay::SimReadoutHeader >.
Definition at line 45 of file SimReadoutEventCnv.cc.
00048 { 00049 MsgStream log(msgSvc(), "SimReadoutHeaderCnv::TranToPer"); 00050 perobj.clear(); 00051 StatusCode sc = HeaderObjectCnv::toPer(tranobj,perobj); 00052 if (sc.isFailure()) return sc; 00053 00054 if(m_saveSimReadouts){ 00055 const vector<SimReadout*>& in_vec = tranobj.readouts(); 00056 vector<SimReadout*>::const_iterator it; 00057 00058 for(it=in_vec.begin();it!=in_vec.end();++it){ 00059 perobj.readouts.push_back( convert(**it) ); 00060 } 00061 } 00062 return StatusCode::SUCCESS; 00063 00064 }
StatusCode SimReadoutHeaderCnv::fillRepRefs | ( | IOpaqueAddress * | addr, | |
DataObject * | dobj | |||
) | [virtual] |
Reimplemented from RootIOTypedCnv< PerSimReadoutHeader, DayaBay::SimReadoutHeader >.
Definition at line 66 of file SimReadoutEventCnv.cc.
00067 { 00068 MsgStream log(msgSvc(), "SimReadoutHeaderCnv::fillRepRefs"); 00069 SimReadoutHeader* rh = dynamic_cast<SimReadoutHeader*>(dobj); 00070 00071 log << MSG::DEBUG 00072 << "Saving links to " << rh->inputHeaders().size() 00073 << " input headers" << endreq; 00074 00075 StatusCode sc = HeaderObjectCnv::fillPer(m_rioSvc,*rh,*m_perOutObj); 00076 if (sc.isFailure()) { 00077 log << MSG::ERROR << "Failed to fill HeaderObject part" << endreq; 00078 return sc; 00079 } 00080 00081 // ... fill SimReadoutHeader part... 00082 return sc; 00083 }
StatusCode SimReadoutHeaderCnv::fillObjRefs | ( | IOpaqueAddress * | addr, | |
DataObject * | dobj | |||
) | [virtual] |
Reimplemented from RootIOTypedCnv< PerSimReadoutHeader, DayaBay::SimReadoutHeader >.
Definition at line 85 of file SimReadoutEventCnv.cc.
00086 { 00087 MsgStream log(msgSvc(), "SimReadoutHeaderCnv::fillObjRefs"); 00088 HeaderObject* hobj = dynamic_cast<HeaderObject*>(dobj); 00089 StatusCode sc = HeaderObjectCnv::fillTran(m_rioSvc,*m_perInObj,*hobj); 00090 if (sc.isFailure()) { 00091 log << MSG::ERROR << "Failed to fill HeaderObject part" << endreq; 00092 return sc; 00093 } 00094 00095 log << MSG::DEBUG 00096 << "Restored links to " << hobj->inputHeaders().size() 00097 << " input headers" << endreq; 00098 00099 // ... fill SimReadoutHeader part... 00100 return sc; 00101 }
PerSimReadout * SimReadoutHeaderCnv::convert | ( | const DayaBay::SimReadout & | simRo | ) |
Definition at line 103 of file SimReadoutEventCnv.cc.
00103 { 00104 PerSimReadout* perSimRo = new PerSimReadout; 00105 ReadoutHeaderCnv *readoutHeaderCnv 00106 = dynamic_cast<ReadoutHeaderCnv*>( this->otherConverter(CLID_ReadoutHeader) ); 00107 if(!readoutHeaderCnv){ 00108 return 0; 00109 } 00110 perSimRo->readout = readoutHeaderCnv->convert( *(simRo.readout()) ); 00111 return perSimRo; 00112 }
SimReadout * SimReadoutHeaderCnv::convert | ( | const PerSimReadout & | perSimRo | ) |
Definition at line 114 of file SimReadoutEventCnv.cc.
00115 { 00116 SimReadout* simRo = new SimReadout; 00117 ReadoutHeaderCnv *readoutHeaderCnv 00118 = dynamic_cast<ReadoutHeaderCnv*>( this->otherConverter(CLID_ReadoutHeader) ); 00119 if(!readoutHeaderCnv){ 00120 return 0; 00121 } 00122 00123 Readout* readout = 0; 00124 if( perSimRo.readout!=0 ) { 00125 readout = readoutHeaderCnv->convert( *(perSimRo.readout) ); 00126 } 00127 simRo->setReadout(readout); 00128 return simRo; 00129 }
PerSimReadoutHeader & RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::getPerInputObject | ( | ) | [inherited] |
PerSimReadoutHeader & RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::getPerOutputObject | ( | ) | [inherited] |
const RootIOBaseObject * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::getBaseInputObject | ( | ) | [virtual, inherited] |
Implements RootIOBaseCnv.
const RootIOBaseObject * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::getBaseOutputObject | ( | ) | [virtual, inherited] |
Implements RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::TranObjectToPerObject | ( | DataObject & | dat, | |
const RootOutputAddress & | ||||
) | [virtual, inherited] |
Implements RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::PerObjectToTranObject | ( | DataObject *& | dat | ) | [virtual, inherited] |
Implements RootIOBaseCnv.
virtual RootInputStream * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::makeInputStream | ( | const RootInputAddress & | ria | ) | [virtual, inherited] |
Implements RootIOBaseCnv.
virtual RootOutputStream * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::makeOutputStream | ( | const RootOutputAddress & | ria | ) | [virtual, inherited] |
Implements RootIOBaseCnv.
virtual long RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::repSvcType | ( | ) | const [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::initialize | ( | ) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::finalize | ( | ) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::createObj | ( | IOpaqueAddress * | addr, | |
DataObject *& | dat | |||
) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::createRep | ( | DataObject * | pObject, | |
IOpaqueAddress *& | refpAddress | |||
) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
int RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::commit | ( | const RootOutputAddress & | roa | ) | [inherited] |
Reimplemented from RootIOBaseCnv.
RootIOBaseCnv * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::otherConverter | ( | int | clID | ) | [inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::queryInterface | ( | const InterfaceID & | riid, | |
void ** | ppvInterface | |||
) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual unsigned long RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::addRef | ( | ) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual unsigned long RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::release | ( | ) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::setDataProvider | ( | IDataProviderSvc * | svc | ) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual IDataProviderSvc * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::dataProvider | ( | ) | const [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::setConversionSvc | ( | IConversionSvc * | svc | ) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual IConversionSvc * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::conversionSvc | ( | ) | const [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::setAddressCreator | ( | IAddressCreator * | creator | ) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual IAddressCreator * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::addressCreator | ( | ) | const [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual const CLID & RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::objType | ( | ) | const [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual long RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::i_repSvcType | ( | ) | const [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::updateObj | ( | IOpaqueAddress * | pAddress, | |
DataObject * | refpObject | |||
) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::updateObjRefs | ( | IOpaqueAddress * | pAddress, | |
DataObject * | pObject | |||
) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::updateRep | ( | IOpaqueAddress * | pAddress, | |
DataObject * | pObject | |||
) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
virtual StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::updateRepRefs | ( | IOpaqueAddress * | pAddress, | |
DataObject * | pObject | |||
) | [virtual, inherited] |
Reimplemented from RootIOBaseCnv.
StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::service | ( | const std::string & | name, | |
T *& | psvc, | |||
bool | createIf = false | |||
) | const [inherited] |
Reimplemented from RootIOBaseCnv.
StatusCode RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::service | ( | const std::string & | type, | |
const std::string & | name, | |||
T *& | psvc | |||
) | const [inherited] |
Reimplemented from RootIOBaseCnv.
static unsigned char RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::storageType | ( | ) | [static, inherited] |
Reimplemented from RootIOBaseCnv.
static const InterfaceID & RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::interfaceID | ( | ) | [static, inherited] |
Reimplemented from RootIOBaseCnv.
static const InterfaceID & RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::interfaceID | ( | ) | [static, inherited] |
Reimplemented from RootIOBaseCnv.
ISvcLocator * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::serviceLocator | ( | ) | const [protected, inherited] |
Reimplemented from RootIOBaseCnv.
IMessageSvc * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::msgSvc | ( | ) | const [protected, inherited] |
Reimplemented from RootIOBaseCnv.
IMessageSvc * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::messageService | ( | ) | const [protected, inherited] |
Reimplemented from RootIOBaseCnv.
IDataManagerSvc * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::dataManager | ( | ) | const [protected, inherited] |
Reimplemented from RootIOBaseCnv.
bool SimReadoutHeaderCnv::m_saveSimReadouts [private] |
Definition at line 50 of file SimReadoutEventCnv.h.
RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::INVALID_ADDRESS [inherited] |
Reimplemented from RootIOBaseCnv.
RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::INVALID_OBJECT [inherited] |
Reimplemented from RootIOBaseCnv.
RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::NO_MEMORY [inherited] |
Reimplemented from RootIOBaseCnv.
RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::BAD_STORAGE_TYPE [inherited] |
Reimplemented from RootIOBaseCnv.
RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::NO_SOURCE_OBJECT [inherited] |
Reimplemented from RootIOBaseCnv.
RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::ICONVERSIONSVC_LAST_ERROR [inherited] |
Reimplemented from RootIOBaseCnv.
std::string RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::m_perclassName [protected, inherited] |
PerSimReadoutHeader * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::m_perInObj [protected, inherited] |
PerSimReadoutHeader * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::m_perOutObj [protected, inherited] |
IRootIOSvc * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::m_rioSvc [protected, inherited] |
Reimplemented from RootIOBaseCnv.
IConversionSvc * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::m_cnvSvc [protected, inherited] |
Reimplemented from RootIOBaseCnv.
RootInputStream * RootIOTypedCnv< PerSimReadoutHeader , DayaBay::SimReadoutHeader >::m_ris [protected, inherited] |
Reimplemented from RootIOBaseCnv.